Tuesday, August 20, 2024
[Keynote Speech 1] 10:00~10:50
AI, EDA and Design: Paths to Disruptive InnovationProf. Andrew B. Kahng
Biography
Andrew B. Kahng is Distinguished Professor of CSE and ECE and holder of the endowed chair in high-performance computing at UC San Diego. He was visiting scientist at Cadence (1995-97) and founder/CTO at Blaze DFM (2004-06). He is coauthor of 3 books and over 500 journal and conference papers, holds 35 issued U.S. patents, and is a fellow of ACM and IEEE. He was the 2019 Ho-Am Prize laureate in Engineering. He has served as general chair of IEEE CEDA-sponsored conferences such as DAC, ISPD, SLIP and MLCAD, and from 2000-2016 served as international chair/co-chair of the International Technology Roadmap for Semiconductors (ITRS) Design and System Drivers working groups. He was the principal investigator of the U.S. DARPA “OpenROAD” project (https://theopenroadproject.org/) from June 2018 to December 2023, and until August 2023 served as principal investigator and director of “TILOS” (https://tilos.ai/), a U.S. NSF AI Research Institute.
Abstract
Recent years have brought a flood of proposed applications for AI and machine learning in EDA. The potential benefits of AI for EDA, including improved design quality with reduced cost and schedule, have attracted significant efforts and focus across both academia and industry. But we have not seen truly disruptive innovation in this space – yet. This talk will examine what disruptive innovations at the AI-EDA nexus – and for hardware design as well – might look like. First, what are root causes for the absence of visible disruptions from AI-EDA innovations? These include technical and ecosystem challenges, the time and patience needed to reach tipping points, and the presence of active blockers to innovation. Second, where might advances in AI for EDA bring truly transformative, disruptive innovations to benefit the semiconductor and design ecosystem? Here, possibilities span analysis and simulation tooling, the nature of design signoff, the EDA-designer-foundry dynamic, and more. There are also basic categories of disruptive innovations: for the EDA business model; for the worldwide ecosystem of academic researchers, EDA vendors, and designers; and for EDA technology itself. Third, and finally, what will accelerate inevitable disruptive innovations, who might deliver them, and how? [Related talks and papers can be found at https://vlsicad.ucsd.edu] |
[Keynote Speech 2] 11:00~11:50
How Pervasive Intelligence is Driving the Multi-Die Revolution, Setting the Stage for Future Semiconductor AdvancementsAbhijeet Chakraborty
Biography
Abhijeet Chakraborty is VP Engineering in Synopsys, leading technology and strategy for the EDA products. In addition, he is driving flexible EDA initiatives on the Cloud, and leading several Government engagements. Abhijeet led the Design Compiler synthesis franchise for over a decade to its leading position in the industry, and rolled out several new products and technologies. He has been an entrepreneur and has several patents in physical synthesis and optimization. Abhijeet is a graduate of the University of Texas at Austin, Austin, Texas and the Indian Institute of Technology, Bombay.
Abstract
The era of pervasive intelligence is revolutionizing not only how we innovate, but also the speed at which we innovate. AI is impacting nearly every industry from data centers, mobile, automotive to aerospace and government. The insatiable compute demands coupled with the staggering explosion of intelligent systems is forcing a reinvention of computing and chip design as we know it. This keynote will address how the demand for higher computational power, performance, and efficiency in AI chips is driving the demand for multi-die systems and how this dependency will be a game-changer in pushing the boundaries of innovation. |
Wednesday, August 21, 2024
[Keynote Speech 3] 09:45~10:25
Cyber-Physical Systems for Building Energy Management: Modeling, Optimization, and ImplementationProf. Ittetsu Taniguchi
Biography
Ittetsu Taniguchi received B.E., M.E., and Ph.D. degrees from Osaka University in 2004, 2006, and 2009, respectively. From 2007 to 2008, he was an international scholar at Katholieke Universiteit Leuven (IMEC), Belgium. In 2009, he joined the College of Science and Engineering, Ritsumeikan University as an assistant professor, and became a lecturer in 2014. In 2017, he joined the Graduate School of Information Science and Technology, Osaka University as an associate professor. His research interests include system-level design methodology of embedded systems and cyber-physical systems. He is a member of IEEE, ACM, IEICE, and IPSJ.
Abstract
The advancements in AI technology, represented by generative AI, significantly transform our society. On the other hand, the energy consumed by AI technology continues to increase. This increase in society’s overall energy consumption is a critical issue that all researchers involved in information technology must seriously consider. Cyber-physical systems (CPS) provide new value by analyzing information obtained from the physical world in the cyber world and feeding back the results to the physical world. In this talk, CPS for energy management in buildings is introduced as an example of CPS design aimed at solving energy problems. Specifically, our initiatives related to CPS are introduced for managing the energy of the HVAC (Heating, Ventilation, and Air Conditioning), which is said to account for about 40% of the energy consumption in buildings, from design to implementation and on-site experiments. |
[Keynote Speech 4] 10:25~11:05
Memory solution for on device AIMr. Dongkyun Kim
Biography
Dongkyun Kim is a SK hynix fellow and the head of next-generation memory architecture for DRAM design. He received his B.S and M.S degrees in information and communication engineering from Chungbuk National University, Korea, in 1993 and 1995, respectively. He joined Hynix in 1995 and has been instrumental in the development of various DRAM technologies including EDO, SDR, DDR1/2/3/4/5, and LPDDR4/5. Since 2013, he has been leading the design team and achieved significant milestones such as the development of the world’s first LPDDR4 and DDR5 DRAMs. In addition, he has been an active member of the JEDEC task group for current and future DRAM SPEC definitions since 2012. And His current focus is on exploring and developing the next generation of memory and sub-systems, particularly in relation to AI.
Abstract
In the AI era, the LLM model size of Generative AI is increasing exponentially, getting closer to human ability, and accordingly, the demand for server’s computing power is also rapidly increasing. However, in preparation for the explosion of demand for AI applications, it is predicted that the server system alone may lack response capabilities, so it is necessary to allocate roles for the AI inference operation of the client system. For this reason, interest in on-device AI is growing, and hardware and software research are actively being conducted to cover “AI inference” by PCs and mobile systems. In this presentation, I would like to introduce the advantages, disadvantages, and development directions of wide IO type high bandwidth memory, processing in memory, and Compute in memory, which are on device-oriented memory solutions. |